Vector: SIL KitΒΆ
Legacy/internal identifier: VECTOR-SIL-KIT
Vendor information
Vendor |
Web page |
Product name |
Version |
|---|---|---|---|
Vector Informatik GmbH |
The Vector SIL Kit |
v4.0.19, tested up to v4.0.37 |
Categories
MDL π |
APL π |
BAN π |
BMA π |
SVC π |
DGN π |
FIU π |
EES π |
FCT π |
DBG π |
IMG π |
AUDIO π |
ENVSIM π |
ENVCOM π |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
β |
β |
β |
β |
Signal recordings π
File format |
Comment |
|---|---|
*.asc |
|
*.mf4 |
BUSACCESS - CAN(-FD) ports support MDF4 bus logging only. XCP ports support signal-based MDF4 recording. |
*.pcapng |
BUSACCESS - CAN(-FD) ports will use linktype=227. The resulting files cannot be processed by trace analysis. |
Platform
Operating system |
Support |
|---|---|
Windows |
β |
Linux |
β |
Info
This tool can be configured and used multiple times in parallel.
PortsΒΆ
- Port BUSACCESS - CAN π
- Port DIAGNOSTICS - CAN π
- Port BUSACCESS - CAN-FD π
- Port DIAGNOSTICS - CAN-FD π
- Port DIAGNOSTICS - CAN-FD_TOLERANT π
- Port BUSACCESS - FLX π
- Port DIAGNOSTICS - FLX π
- Port BUSACCESS - LIN π
- Port BUSACCESS - SOCKETADAPTOR π
- Port DIAGNOSTICS - DOIP π
- Port APPLICATION - XCP-ETH π
- Port APPLICATION - XCP-CAN π
- Port APPLICATION - XCP-CAN-FD π
- Port APPLICATION - XCP-CAN-FD-TOLERANT π
- Port LOGGING - DLT-VERBOSE π
- Port SERVICEACCESS - ETHERNET-RAW π
- Port SERVICEACCESS - SERVICE-PASSIVE π
- Port SERVICEACCESS - SERVICE π
- Port SERVICEACCESS - ARP π
- Port SERVICEACCESS - UDP-SOCKET π
- Port SERVICEACCESS - TCP-SERVER-SOCKET π
- Port SERVICEACCESS - TCP-CLIENT-SOCKET π
- Port SERVICEACCESS - UDP-RAW π
- Port SERVICEACCESS - ICMP-RAW π
- Port SERVICEACCESS - RECORDING-PCAP π
- Port SERVICEACCESS - IPSEC π
- Port SERVICEACCESS - MACSEC π
- Port MODELACCESS - DEFAULT π
- Port SERVICEACCESS - TLS π
SpecificsΒΆ
This interface allows direct access to simulated Ethernet as well as CAN, CAN-FD, LIN and FlexRay buses. It supports the test steps read signal, read/write signal group (all bus systems) as well as monitor (CAN, CAN-FD, LIN and FlexRay) and supports signal recording (all bus systems), Raw diagnostics with KWP2000 over ISO-TP (CAN only), the Mini residual bus simulation (CAN, CAN-FD and FlexRay) and Additional functions of the close-to-hardware bus connections (all bus systems).
At the moment only the unsynchronized simulation mode is supported.
Info
The APPLICATION ports can only be used with the Add-on ecu.test calibration
Prerequisites
The Vector SIL Kit must be available on the tool host. As it will not be installed, but extracted to an arbitrary folder, the path to SilKit.dll (Windows) or libSilKit.so (Linux) has to be entered in the TBC editor at tool level.
ecu.test will not attempt to start the SIL Kit registry, but expects it to be already running and available under the URI specified in the TBC.
Note on the use of ethernet ports
In order to exchange ethernet packets with other SIL Kit participants, the name of a suitable network as well as an arbitrary controller name must be entered in the TBC.
Info
Further informationen about the purposes of the various Ethernet port types and their differences can be found in the description of the tool adapter tracetronic: Ethernet. All those not ending in -RAW here except ARP correspond to a similarly named type with the suffix or infix -PCAP there.
Note on the use of FLX ports
FlexRay ports can only communicate if SIL Kit runs a detailed simulation using the NetworkSimulator. The NetworkSimulator is not part of the SIL Kit itself, but can be obtained from Vector Informatik GmbH.
Enable simulation time in portsΒΆ
In order to use the simulation time in the ports, a MODELACCESS - DEFAULT port must be created and the tool option enable model time must be set to True. Without this selection, system time will be used rather than simulation time.
Simulation time controlΒΆ
See also Temporal behaviour: Real time and simulation time modes.
In order to use the simulation time in the test case, a MODELACCESS - DEFAULT port must be created and used in the TCF. In particular, it has to be selected on the tab Execution as the Temporal behavior source. Without this selection, system time will be used rather than simulation time.
The following points should also be noted:
Stepwise execution in simulation timeΒΆ
This mode is currently not supported.
Continuous execution in simulation timeΒΆ
In this mode, a SIL Kit participant created for that purpose streams the current simulation time to ecu.test. The simulation time affects the test case itself (e.g. Wait test steps or time options of evaluations). Furthermore, simulation time is applied within Ethernet communication protocols to fulfill cycle times, observe timeouts etc.
Properties πΒΆ
Name |
Available if |
Default value |
Valid values |
Type |
Description |
|---|---|---|---|---|---|
SIL Kit Library Path |
string |
Path to SilKit.dll or libSilKit.so, as an absolute path or relative to the tool hostβs base path |
|||
SIL Kit Registry URI |
βsilkit://localhost:8500β |
string |
URI to the Sil Kit Registry Server |
||
Activate model time |
β |
bool |
Use model time for all ports. When activated, a model port must be configured in the SIL Kit. |
||
Timeout for tool call β²in sec.β³ |
β600β |
string |
Timeout after which a tool call is aborted. |
Jobs πΒΆ
ClearArpCacheΒΆ
Clears all entries from the internal ARP/NDP cache