Port BUSACCESS - GENERIC_SOCKETADAPTOR

Generic bus access for SocketAdaptor ports

Stimulation

This port has no stimulus capabilities.

Specifics

Bus port for access to the rest bus simulation of the environment model. Using this port, bus mappings from bus databases can be used in the test cases. In the background these mappings are translated to the corresponding model variable(s).

The representation of signal/message names on model paths can be largely configured by means of path patterns. The syntax for these patterns is described in the help section on the generic bus port.

Port type SOCKETADAPTOR GENERIC

This port is a compact variation of the generic bus port and is intended for usage with wildcards. Read and write access are supported.

Additional placeholders

receiver

Name of a receiving/consuming control unit. If model paths exist for multiple receiving control units, the first one is used.

Wildcard functionality

With the symbol “?” a single-character placeholder can be used in the path pattern. The number of these placeholders must match the number of actual characters. To limit the possibility of multiple matches, the wildcard is only allowed for the “Bus path” setting describing the base path of the matched model variable paths.

Ambiguity

If multiple possible model paths match for a given signal and path pattern, the first one is used. Which model variable is accessed can be found out using the extended logging.

Name

Available if

Default value

Valid values

Type

Description

Bus identifier

string

Logical name of the bus system

Model port

string

Port ID (e.g. “MDL01”) of the model port via which the model access is to be performed. This property can remain empty if there is exactly one model port. If there is more than one model port, this property must be set.

Bus-DB

string

Bus-database (This bus-database is usually taken from the test configuration. Please note that the bus-database is not automatically transferred to the tool, but must be stored there manually.)

Bus path

‘slave_?Appl/BusSystems/Ethernet/Ethernet_K?’

string

Base path of the model variables for the bus signals and messages. The Rx and Tx path specifications refer to this base path. The bus path may contain the single character wildcard “?”.

Rx path

‘%(receiver)s/RX/IPDUs/%(pdu)s/Signals/%(signal)s/Value’

string

Pattern of model path for signal reading

Tx path

‘%(node)s/TX/IPDUs/%(pdu)s/Signals/%(signal)s/Overwrite Value’

string

Pattern of model path for signal manipulation

Tx-Switch path

‘%(node)s/TX/IPDUs/%(pdu)s/Signals/%(signal)s/Switch Value’

string

Pattern of model path to the switch for signal manipulation